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? semiconductor components industries, llc, 2006 march, 2006 -- rev. 3 1 publication order number: ncp623/d ncp623 ultra low noise 150 ma low dropout voltage regulator with on/off control housed in a micro8 t or dfn6 package, the ncp623 delivers up to 150 ma where it exhibits a typical 180 mv dropout. with an incredible noise level of 25 m vrms (over 100 hz to 100 khz, with a 10 nf bypass capacitor), the ncp623 represents the ideal choice for sensitive circuits, especially in portable applications where noise performance and space are premium. the ncp623 also excels in response time and reacts in less than 25 m s when receiving an off to on signal (with no bypass capacitor). due to a novel concept, the ncp623 accepts output capacitors without any restrictions regarding their equivalent series resistance (esr) thus offering an obvious versatility fo r immediate implementation. with a typical dc ripple rejection better than --90 db (--70 db @ 1.0 khz), it naturally shields the downstream electronics against choppy power lines. additionally, thermal shutdown and short--circuit protection provide the final product with a high degree of ruggedness. features ? very low quiescent current 170 m a (on, no load), 100 na (off, no load) ? very low dropout voltage, typical value is 137 mv at an output current of 100 ma ? very low noise with external bypass capacitor (10 nf), typically 25 m vrms over 100 hz to 100 khz ? internal thermal shutdown ? extremely tight line regulation typically --90 db ? ripple rejection --70 db @ 1.0 khz ? line transient response: 1.0 mv for v in =3.0v ? extremely tight load regulation, typically 20 mv at i out = 150 ma ? multiple output voltages available ? logic level on/off control (ttl--cmos compatible) ? esr can vary from 0 to 3.0 ? these devices are available in pb--free package(s). specifications herein apply to both standard and pb--free devices. please see our website at www.onsemi.com for specific pb--free orderable part numbers, or contact your local on semiconductor sales office or representative. applications ? all portable systems, battery powered systems, cellular telephones, radio control systems, toys and low voltage systems pin connections see detailed ordering and shipping information on page 12 of this data sheet. ordering information xxx = specific device code yy = voltage option a = assembly location l = wafer lot y = year w = work week g =pbfreepackage (note: microdot may be in either location) xxx ayw g g 1 8 micro8 dm suffix case 846a marking diagrams 1 v out nc bypass nc on/off gnd v in gnd micro8 (top view) 1 2 3 4 8 7 6 5 dfn6, 3x3 mn suffix case 488ae dfn6 (top view) v in gnd v out on/off gnd bypass 1 2 3 6 5 4 ncp6 23yy alyw g g http://onsemi.com 1
ncp623 http://onsemi.com 2 gnd figure 1. ncp623 block diagram * current limit * antisaturation * protection v in v out gnd bypass band gap reference on/off on/off thermal shutdown maximum ratings rating symbol value unit power supply voltage v in 12 v power dissipation and thermal resistance maximum power dissipation p d internally limited w case 488ae (dfn6, 3x3) mn suffix thermal resistance, junction--to--air thermal resistance, junction--to--case case 846a (micro8) dm suffix thermal resistance, junction--to--air thermal resistance, junction--to--case r ja **psi--jc* or jc r ja r jc 161 13 240 105 c/w operating ambient temperature range t a -- 4 0 t o + 8 5 c maximum junction temperature t jmax 150 c storage temperature range t stg --60 to +150 c esd protection -- human body model machine model v esd 2000 200 v stresses exceeding maximum ratings may damage the device. maximu m ratings are stress ratings onl y. functional operation above the recommended operating conditions is not implied. extended exposure t o stresses above the recommended operating conditions may affect device reliability. *?c?? (?case??) is defined as the solder--attach interface between the center of the exposed pad on the bottom of the package, and the board to which it is attached. ** refer to the jedec specs (51--2, 51--6).
ncp623 http://onsemi.com 3 electrical characteristics (for typical values t a =25 c, for min/max values t a =--40 cto+85 c, max t j = 150 c) characteristics symbol min typ max unit control electri cal characteristics input voltage range v on/off 0 -- v in v on/off input current (all versions) v on/off =2.4v i on/off -- 2.5 -- m a on/off input voltages (all versions) logic ?0?, i.e. off state logic ?1?, i.e. on state v on/off -- 2.2 -- -- 0.3 -- v currents parameters current consumption in off state (all versions) off mode current: v in =v out +1.0v,i out =0ma iq off -- 0.1 2.0 m a current consumption in on state (all versions) on mode sat current: v in =v out +1.0v,i out =0ma iq on -- 170 200 m a current consumption in saturation on state (all versions) on mode sat current: v in =v out -- 0 . 5 v , i out =0ma iq sat -- 900 1400 m a current limit v in =v out + 1.0 v, (all versions) output short--circuited (note 1) i max 175 210 -- ma v in =v out +1.0v,t a =25 c, 1.0 ma < i out < 150 ma 3.3 suffix 4.0 suffix 5.0 suffix v out 3.23 3.92 4.90 3.3 4.0 5.0 3.37 4.08 5.1 v v in =v out +1.0v,--40 c ncp623 http://onsemi.com 4 definitions load regulation -- the change in output voltage for a change in load current at constant chip temperature. dropout voltage -- the input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. measured when the output drops 100 mv below its nominal value (which is measured at 1.0 v differential), dropout voltage is affected by junction temperature, load current and minimum input supply requirements. output noise voltage -- the rms ac voltage at the output with a constant load and no input ripple, measured over a specified frequency range. maximum power dissipation -- the maximum total dissipation for which the regulator will operate within specifications. quiescent current -- current which is used to operate the regulator chip and is not delivered to the load. line regulation -- the change in input voltage for a change in the input voltage. the measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected. line transient response -- typical over-- and undershoot response when input voltage is excited with a given slope. thermal protection -- internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated, typically 150 c, the regulator turns off. this feature is provided to prevent catastrophic failures from accidental overheating. maximum package power dissipation -- t h e m a x i m u m package power dissipation is the power dissipation level at which the junction temperature reaches its maximum value i.e. 125 c. the junction temperature is rising while the difference between the input power (v cc xi cc )andthe output power (v out xi out ) is increasing. depending on ambient temperature, it is possible to calculate the maximum power dissipation, maximum load current or maximum input voltage (see application hints: protection). the maximum power dissipation supported by the device is a lot increased when using appropriate application design. mounting pad configuration on the pcb, the board material and also the ambient temperature are affected the rate of temperature rise. it means that when the i c has good thermal conductivity through pcb, the junction temperature will be ?low? even if the power dissipation is great. the thermal resistance of the whole circuit can be evaluated by deliberately ac tivating the thermal shutdown of the circuit (by increasing the output current or raising the input voltage for example). then you can calculate the power dissipation by subtracting the output power from the input power. all variables are then well known: power dissipation, thermal shutdown temperature (150 c for ncp623) and ambient temperature.
ncp623 http://onsemi.com 5 application hints input decoupling -- as with any regulator, it is necessary to reduce the dynamic impedance of the supply rail that feeds the component. a 1.0 m f capacitor either ceramic or tantalum is recommended and should be connected close to the ncp623 package. higher values will correspondingly improve the overall line transient response. output decoupling -- due to a novel concept, the ncp623 is a stable component and does not require any equivalent series resistance (esr) neither a minimum output current. capacitors exhibiting esrs ranging from a few m up to 3.0 can thus safely be used. the minimum decoupling value is 1.0 m f and can be augmented to fulfill stringent load transient requi rements. the regulator accepts ceramic chip capacitors as well as tantalum devices. noise performances -- unlike other ldos, the ncp623 is a true low--noise regulator. with a 10 nf bypass capacitor, it typically reaches the incredible level of 25 m vrms overall noise between 100 hz and 100 khz. to give maximum insight on noise specifications, on semiconductor includes spectral density graphics as well as noise dependency versus bypass capacitor. the bypass capacitor impacts the start--up phase of the ncp623 as depicted by the data--sheet curves. a typical 1.0 ms settling time is achieved with a 10 nf bypass capacitor. however, due to its lo w--noise architecture, the ncp623 can operate without bypass and thus offers a typical 20 m s start--up phase. in that case, the typical output noise stays lower than 65 m vrms between 100 hz -- 100 khz. protections -- the ncp623 hosts several protections, conferring natural ruggedness and reliability to the products implementing the component. the output current is internally limited to a minimum of 175 ma while temperature shutdown occurs if the die heats up beyond 150 c. these value lets you assess the maximum differential voltage the device can sustain at a given output current before its protections come into play. the maximum dissipation the package can handle is given by: p max = t jmax ?t a r ja if t jmax is internally limited to 150 c, then the ncp623 can dissipate up to 595 mw @ 25 c. the power dissipated by the ncp623 can be calculated from the following formula: ptot = ? v in ? i gnd (i out ) ? + ? v in ? v out ? ? i out or vin max = ptot + v out ? i out i gnd + i out if a 150 ma output current is needed, the ground current is extracted from the data--sheet curves: 6.5 ma @ 150 ma. for a ncp623nw28r2 (2.8 v), the maximum input voltage will then be 6.48 v, a rather comfortable margin. typical application -- the following figure portraits the typical application for the ncp623 where both input/output decoupling capacitors appear. figure 2. a typical ncp623 application with recommended capacitor values (dfn6) 64 123 input output c3 1.0 m f c2 1.0 m f c1 10 nf on/off ncp623 5 figure 3. a typical ncp623 application with recommended capacitor values (micro8) 87 5 12 4 output input c2 1.0 m f c3 1.0 m f c1 10 nf on/off ncp623 6 3 nc nc
ncp623 http://onsemi.com 6 ncp623 wake--up improvement -- in portable applications, an immediate response to an enable signal is vital. if noise is not of concern, the ncp623 without a bypass capacitor settles in nearly 20 m s and typically delivers 65 m vrms between 100 hz and 100 khz. in ultra low--noise systems, the designer needs a 10 nf bypass capacitor to decrease the noise down to 25 m vrms between 100 hz and 100 khz. with the addition of the 10 nf capacitor, the wake--up time expands up to 1.0 ms as shown on the data--sheet curves. if an immediate response is wanted, following figure?s circuit gives a solution to charge the bypass capacitor with the enable signal without degrading the noise response of the ncp623. at power--on, c4 is discharged. when the control logic sends its wake--up signal by going to a high level, the pnp base is momentarily tied to ground. the pnp switch closes and immediately charges the bypass capacitor c1 toward its operating value. after a few m s, the pnp opens and becomes totally transparent to the regulator. this circuit improves the response time of the regulator which drops from 1.0 ms down to 30 m s. the value of c4 needs to be tweaked in order to avoid any bypass capacitor overload during the wake--up transient. figure 4. a pnp transistor drives the bypass pin when enable goes high (dfn6) 13 ncp623 + + c2 1.0 m f c3 1.0 m f input output c4 470 pf c1 10 nf r2 220 k mmbt2902lt1 q1 on/off 2 64 5 figure 5. a pnp transistor drives the bypass pin when enable goes high (micro8) ncp623 + c2 1.0 m f input output 75 6 8 24 3 1 + c3 1.0 m f c1 10 nf on/off r2 220 k c4 470 pf mmbt2902lt1 q1
ncp623 http://onsemi.com 7 figure 6. ncp623 wake--up improvement with small pnp transistor 1ms 30 m s ncp623 without wake--up improvement (typical response) ncp623 with wake--up improvement (typical response) the pnp being wired upon the bypass pin, it shall not degrade the noise response of the ncp623. figure 7 confirms the good behavior of the integrated circuit in this area which reaches a typical noise level of 26 m vrms (100 hz to 100 khz) at i out =60ma. frequency (hz) nv/sqrt (hz) 100 1,000 350 200 150 100 1,000,000 50 10,000 figure 7. noise density of the ncp623 with a 10 nf bypass capacitor and a wake--up improvement network 100,000 250 300 0 c byp =10nf v in =3.8v v out =2.8v c o =1.0 m f i out =60ma t amb =25 c output noise = 26 m vrms c = 10 nf @ 100 hz -- 100 khz
ncp623 http://onsemi.com 8 -- 4 0 2.1 0 7.0 ambient temperature ( c) ground current (ma) figure 8. ground current versus output current output current (ma) figure 9. ground current versus ambient temperature v in =3.8v v out =2.8v c o =1.0mf t amb =25 c ground current (ma) 20 40 100 --20 0 20 40 60 80 1.0 0 2.05 2.0 1.95 1.9 1.8 1.85 60 80 120 140 200 160 180 2.0 3.0 4.0 5.0 6.0 v in =3.8v v out =2.8v c o =1.0 m f i out =60ma typical performance characteristics ground current performances figure 10. quiescent current versus tempera ture figure 11. line transient response line transient response and output voltage dv in =3.2v y2 y1 v in = 3.8 to 7.0 v y1 = 1.0 mv/div y2 = 1.0 v/div x=1.0ms i out =60ma t amb =25 c -- 4 0 200 temperature ( c) -- 2 0 110 100 0 204060 100 80 120 130 140 150 160 170 180 190 quiescent current on mode ( m a)
ncp623 http://onsemi.com 9 y1: output current, y2: output voltage y1: output current, y2: output voltage figure 12. i out = 3.0 ma to 150 ma figure 13. i slope = 100 ma/ m s (large scale) i out = 3.0 ma to 150 ma v in =3.8v y1 = 100 mv/div y2 = 20 mv/div x = 200 m s/div t amb =25 c y2 y1 v in =3.8v y1 = 50 ma/div y2 = 20 mv/div x=20 m s t amb =25 c y2 y1 y1: output current, y2: output voltage y1: output current, y2: output voltage figure 14. i slope =6.0ma/ m s (large scale) i out = 3.0 ma to 150 ma figure 15. i slope =2.0ma/ m s (large scale) i out = 3.0 ma to 150 ma v in =3.8v y1 = 50 ma/div y2 = 20 mv/div x = 100 m s t amb =25 c y2 y1 v in =3.8v y1 = 50 ma/div y2 = 20 mv/div x = 200 m s t amb =25 c y2 y1 load transient response versus load current slope typical performance characteristics
ncp623 http://onsemi.com 10 0 70 bypass capacitor (nf) bypass capacitor (nf) frequency (hz) figure 16. noise density versus bypass capacitor figure 17. rms noise versus bypass capacitor (100 hz -- 100 khz) figure 18. output voltage settling time versus bypass capacitor figure 19. output voltage settling shape c bypass =10nf 2.0 3.0 4.0 5.0 50 40 30 20 0 10 1.0 60 10 v in =3.8v v out =2.8v c o =1.0 m f i out =60ma t amb =25 c v in =3.8v v out =2.8v c o =1.0 m f i out =60ma t amb =25 c v in =3.8v v out =2.8v c out =1.0 m f i out =50ma t amb =25 c figure 20. output voltage settling shape c bypass =3.3nf figure 21. output voltage settling shape without bypass capacitor 6.0 7.0 8.0 9.0 0 1200 1.0 2.0 3.0 4.0 6.0 10 1000 800 600 400 0 200 5.0 7.0 9.0 8.0 200 m s/div 500 mv/div c byp =10nf nv/hz 100 350 1000 10,000 250 200 150 100 0 1,000,000 300 50 100,000 v in =3.8v v out =2.8v c o =1.0 m f i out =60ma t amb =23 c c byp =10nf 3.3 nf 0nf v in =3.8v v out =2.8v c out =1.0 m f i out =50ma t amb =25 c 100 m s/div 500 mv/div c byp =3.3nf v in =3.8v v out =2.8v c out =1.0 m f i out =50ma t amb =25 c 10 m s/div 500 mv/div c byp =0nf typical performance characteristics noise performances settling time performances vn = 65 m vrms @ c bypass =0 vn = 30 m vrms @ c bypass =3.3nf vn = 25 m vrms @ c bypass =10nf over 100 hz to 100 khz settline time ( m a) rms noise ( m a)
ncp623 http://onsemi.com 11 dropout (mv) -- 4 0 250 temperature ( c) temperature ( c) i o (ma) figure 22. dropout voltage versus i out figure 23. dropout voltage versus temperature figure 24. output voltage versus temperature figure 25. output voltage versus i out -- 2 0 0 2 0 150 100 0 100 200 50 figure 26. ripple rejection versus frequency with 10 nf bypass capacitor figure 27. ripple rejection versus frequency without bypass capacitor 40 60 80 -- 4 0 2.805 output voltage (v) --20 0 40 100 2.795 2.790 2.785 2.780 2.770 2.775 20 80 60 dropout (mv) 10 60 250 200 150 100 0 150 50 100 t y pical perform a nce ch a r a cteristics dropout voltage output voltage ripple rejection performances frequency (hz) v in =3.8v v out =2.8v c o =1.0 m f i out =60ma t amb =25 c 100 0 (db) 1000 100,000 -- 1 0 -- 6 0 -- 7 0 -- 8 0 --100 -- 9 0 10,000 -- 2 0 -- 3 0 -- 4 0 -- 5 0 frequency (hz) v in =3.8v v out =2.8v c o =1.0 m f i out =60ma t amb =25 c 10 0 (db) 1000 100,000 -- 6 0 -- 8 0 --120 10,000 -- 2 0 -- 4 0 100 1,000,000 --100 85 c 25 c -- 4 0 c 150 ma 100 ma 60 ma 10 ma 2.800 output current (ma) 0 2.860 output voltage (v) 20 40 80 160 2.800 2.780 2.740 2.760 60 120 100 2.820 140 2.840 -- 4 0 c 25 c 85 c 1ma 100 ma 60 ma 150 ma
ncp623 http://onsemi.com 12 ordering information device version package shipping ? ncp623dm--3.3r2 3.3 v micro8 4000 tape & reel ncp623dm--3.3r2g micro8 (pb--free) ncp623dm--4.0r2 4.0 v micro8 ncp623dm--4.0r2g micro8 (pb--free) ncp623dm--5.0r2 5.0 v micro8 ncp623dm--5.0r2g micro8 (pb--free) ncp623mn--3.3r2 3.3 v dfn6, 3x3 3000 tape & reel ncp623mn--4.0r2 4.0 v ncp623mn--4.0r2g dfn6, 3x3 (pb--free) ncp623mn--5.0r2 5.0 v dfn6, 3x3 ?for information on tape and reel specificat ions, including part orientation and tape si zes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp623 http://onsemi.com 13 package dimensions s b m 0.08 (0.003) a s t dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c -- -- -- 1 . 1 0 -- -- -- 0 . 0 4 3 d 0.25 0.40 0.010 0.016 g 0.65 bsc 0.026 bsc h 0.05 0.15 0.002 0.006 j 0.13 0.23 0.005 0.009 k 4.75 5.05 0.187 0.199 l 0.40 0.70 0.016 0.028 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. 846a--01 obsolete, new standard 846a--02. -- b -- -- a -- d k g pin 1 id 8pl 0.038 (0.0015) -- t -- seating plane c h j l micro8 dm suffix case 846a--02 issue f
ncp623 http://onsemi.com 14 package dimensions 6 pin dfn, 3x3 case 488ae--01 issue a notes: 1. dimensions and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25and0.30mmfromterminal. 4. coplanarity applies to the exposed pad as well as the terminals. 5. terminal b may have mold compound material along side edge. mold flashing may not exceed 30 microns onto bottom surface of terminal b. dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 b 0.18 0.30 d 3.00 bsc d2 2.25 2.55 e 3.00 bsc e2 1.55 1.85 e 0.65 bsc k 0 . 2 0 -- -- -- l 0.30 0.50 d b e c 0.15 a c 0.15 2x 2x top view side view bottom view c a (a3) a1 6x seating plane c 0.08 c 0.10 e 6x l k e2 d2 b note 3 6x 0.10 c 0.05 c ab 6x pin one reference 0.20 0.25 l1 0.00 0.021 detail b detail a 13 64 detail b (a3) side view a1 mold compound exposed cu l1 detail a edge of package bottom view 3.31 0.130 0.63 0.025 0.65 0.025 0.35 0.014 2.45 0.964 1.700 0.685 exposed pad smd defined *for additional information on our pb--free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further noti ce to any products herein. sc illc makes no warranty, repres entation or guarantee r egarding the suitability of its produc ts for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specif ically disclaims any and all liability, including without limitation speci al, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performa nce may vary over time. all operating parameters, including ?typicals? must be validated for each cus tomer application by customer?s technical experts. scillc does not conve y any license under its patent rights nor the rights of others. scillc pr oducts are not designed, intended, or autho rized for use as components in systems i ntended for surgical implant int o the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal inj ury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, em ployees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, an y claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the p art. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800--282--9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2--9--1 kamimeguro, meguro--ku, tokyo, japan 153--0051 phone : 81--3--5773--3850 ncp623/d micro8 is a trademark of international rectifier. literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082--1312 usa phone : 480--829--7710 or 800--344--3860 toll free usa/canada fax : 480--829--7709 or 800--344--3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.

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